This invention relates to a multiplexed computer system, and more particularly to a multiplexed computer system in which memory copying for putting memories of the multiplexed computer system into coincidence with each other is effected.
A conventional multiplexed computer system wherein a plurality of processing units execute a same calculation in synchronism with each other requires means for putting stored contents of memories of all of the processing units into coincidence with each other in order to allow the processing units to perform a same operation in synchronism with each other, that is, to perform a multiplexed operation again after one of the processing units is disabled because of a failure or a periodic inspection is performed for a particular one of the processing units.
As a method of putting stored contents of memories of all processing units which operate, for example, in a duplicated condition into coincidence with each other, the following two memory copying methods are adopted usually.
In particular, as the first memory copying method, in a computer system which operates in a duplicated condition, an operation of copying a fixed region of stored contents of a memory provided in one of processing units which is operating (hereinafter referred to as normal system processing unit) into another memory provided in another one of the processing units which is not operating (hereinafter referred to as abnormal system processing unit) using data transfer means of the normal system processing unit between a memory and a peripheral equipment, that is, so-called DMA engine, is repetitively executed after each fixed interval of time. Further, where a processor provided in the normal system processing unit is constructed so that it can access only the memory in the same processing unit, data to be written from the processor provided in the normal system processing unit into the memory of the same processing unit are transferred to the memory provided in the abnormal system processing unit. An example which discloses a technique regarding this is Japanese Patent Laid-Open Application No. Hei 3-182958.
As the second memory copying method, in a computer system which includes processing units which operate in a triplicated condition and global memories which operate in a duplicated condition and wherein each of the processing units includes a local memory and data transfer means between the local memory and the global memories, that is, so-called DMA engine, an operation of copying a fixed region of stored contents of one of the global memories which is operating (normal system) into the other global memory which is not operating (abnormal system) via the local memory provided in the processing unit using the DMA engine provided in the processing unit is repetitively executed after each fixed interval of time until all regions of the memory are copied. It is to be noted that, while the stored contents of the memory are being transferred, accessing to the global memories by a peripheral equipment, that is, DMA, is inhibited. A technique regarding this is disclosed in Doug Jewett, xe2x80x9cIntegrity S2: A Fault-Tolerant Unix Platformxe2x80x9d, Twenty-First FTCS International symposium, Montreal, 1991.
A multiplexed computer system having an obstacle resisting function has a so-called on-line maintenance function of allowing repair or exchange a failed element while executing ordinary processing in order to allow a multiplexed operation to be performed again, and even while such on-line maintenance is performed, it is required to prevent deterioration of a processing performance. Accordingly, memory copying essentially required for on-line maintenance must be performed without making an obstacle to ordinary processing.
However, in memory copying in on-line maintenance, stored contents of the memory provided in the normal system processing unit which always vary by ordinary processing must be transferred to the memory provided in the abnormal system processing unit while maintaining the consistency, and the following problems which disturb this must be solved.
In particular, if the normal system processing unit reads out, immediately before certain regions of the memories provided in the normal system processing unit and the abnormal system processing unit are rewritten simultaneously by ordinary processing, the region of the memory thereof and transfers the thus read out data to the region of the memory of the abnormal system processing unit in order to perform memory copying, then after the regions of the memories of the normal system processing unit and the abnormal system processing unit are rewritten by ordinary processing, the data prior to such rewriting are copied into the region of the memory of the abnormal system processing unit. Consequently, the consistency between the memories of the normal system processing unit and the abnormal system processing unit is lost.
According to the first conventional method described above, memory coping is executed using the DMA engine provided in the normal system processing unit, and consequently, during execution of memory copying, DMA between the two system memories and a peripheral equipment by the DMA engine is not executed. Accordingly, during execution of memory copying, both of the memories are not rewritten by DMA, thereby solving the problem of the loss of the memory consistency described above.
Meanwhile, according to the second conventional system described above, memory copying is executed using a DMA engine provided in a processing unit, and consequently, during execution of memory copying, DMA between a local memory and the two system global memories by the DMA engine is not executed. Further, since DMA between a peripheral equipment and the two system global memories is inhibited during execution of memory copying, the two global memories are not rewritten by DMA during execution of memory copying, thereby solving the problem of the loss of the memory consistency described above.
However, those conventional methods have a problem in that, during execution of memory copying, DMA between a peripheral equipment and a memory and DMA between a local memory and a global memory cannot be executed. Further, they have another problem in that, since an operation of copying a fixed memory region by means of a DMA engine is executed repetitively after each fixed interval of time until all regions of the memory are copied, overheads by pre-processing for memory copying such as setting of a DMA engine or flushing of a cache memory are increased. It is to be noted that, since flushing of a cache memory is performed such that a region of the cache memory corresponding to a memory region to be copied is flushed before memory copying is executed and then, after copying of all of the memory regions is completed, the all regions of the cache memory are flushed again, cache flushing executed in memory copying is equal to the sum total of the memory capacity and the cache capacity. Those problems make causes of deterioration of the processing performance during on-line maintenance.
It is an object of the present invention to provide a memory copying method for a multiplexed computer system composed of a plurality of processing units which allows memory accessing by a processor or a peripheral equipment even during execution of memory copying and minimizes overheads by pre-processing for memory copying.
In order to attain the object described above, there is provided a multiplexed computer system which includes a plurality of processing units which effect a same operation in synchronism with each other, and one or a plurality of peripheral equipments capable of accessing all of the processing units and wherein each of the processing units at least includes a processor or processors which effect operation processing, a cache and a memory unit which is accessible by the processor or processors and the peripheral equipment or equipments and the plurality of processing units are communicatable with each other, wherein each of the processing units includes copying means for transferring stored contents read out from the memory unit by the processor or processors and copies of data to be written into the memory unit by the processor or processors or the peripheral equipment or equipments in the same order as that of accesses to the memory unit, a copy processor register for designating one of the processor or processors which is to execute reading out of stored contents of the memory unit in order to effect memory copying, a copy mode flag for indicating that memory copying processing for making the stored contents of the memory unit of the self system and stored contents of the memory unit or units of the processing unit or units of the other system or systems coincide with each other is proceeding, and a copy task flag for indicating that the memory copying processing is proceeding and the processor is reading out the stored contents of the memory unit in order to transfer the stored contents of the memory unit of the self system to the memory unit or units of the processing unit or units of the other system or systems. Further, as another means for achieving the object described above, there is provided a multiplexed computer system which includes a plurality of processing units which effect a same operation in synchronism with each other, and one or a plurality of peripheral equipments capable of accessing all of the processing units and wherein each of the processing units at least includes a processor or processors which effect operation processing, a cache and a memory unit which is accessible by the processor or processors and the peripheral equipment or equipments and the plurality of processing units are communicatable with each other, wherein each of the processing units includes copying means for transferring stored contents read out from the memory unit by the processor or processors and copies of data to be written into the memory unit by the processor or processors or the peripheral equipment or equipments in the same order as that of accesses to the memory unit, a copy processor register for designating one of the processor or processors which is to execute reading out of stored contents of the memory unit in order to effect memory copying, verification means for comparing a latest address read out by the designated processor with an address of a write access to the memory unit from any of the peripheral equipment or equipments and, when a difference between the two values is smaller than a value determined in advance, instructing the copying means to transfer a copy of the data in the write access to the memory unit to the memory unit or units of the other processing unit or units, but, when the difference between the two values is larger than the value determined in advance, instructing the copying means not to transfer the copy of the write access data to the memory unit to the memory unit or units of the other processing unit or units, a copy mode flag for indicating that memory copying processing for making the stored contents of the memory unit of the self system and stored contents of the memory unit or units of the processing unit or units of the other system or systems coincide with each other is proceeding, and a copy task flag for indicating that the memory copying processing is proceeding and the processor is reading out the stored contents of the memory unit in order to transfer the stored contents of the memory unit of the self system to the memory unit or units of the processing unit or units of the other system or systems.
Further, as a further means for achieving the object described above, there is provided a multiplexed computer system which includes a plurality of processing units which effect a same operation in synchronism with each other, and one or a plurality of peripheral equipments capable of accessing all of the processing units and wherein each of the processing units at least includes a processor or processors which effect operation processing, a cache and a memory unit which is accessible by the processor or processors and the peripheral equipment or equipments and the plurality of processing units are communicatable with each other, wherein each of the processing units further includes memory read-out means for reading out stored contents of the memory unit successively from all regions of the memory unit beginning with a top address or a last address, copying means for transferring stored contents read out from the memory unit by the memory read-out means and copies of data to be written into the memory unit by the processor or processors or the peripheral equipment or equipments to the memory unit or units of the other processing unit or units in the same order as that of the accesses to the memory unit, a copy address register for indicating an address which makes an object of copying of the memory unit, and a copy mode flag for indicating that memory copying processing for making the stored contents of the memory unit of the self system with stored contents of the memory unit or units of the processing unit or units of the other system or systems coincide with each other is proceeding.
Further, as a further means for achieving the object described above, there is provided a multiplexed computer system which includes a plurality of processing units which effect a same operation in synchronism with each other, and one or a plurality of peripheral equipments capable of accessing all of the processing units and wherein each of the processing units at least includes a processor or processors which effect operation processing, a cache and a memory unit which is accessible by the processor or processors and the peripheral equipment or equipments and the plurality of processing units are communicatable with each other, wherein each of the processing units further includes memory read-out means for reading out stored contents of the memory unit successively from all regions of the memory unit beginning with a top address or a last address, copying means for transferring stored contents read out from the memory unit by the memory read-out means and copies of data to be written into the memory unit by the processor or processors or the peripheral equipment or equipments to the memory unit or units of the other processing unit or units in the same order as that of the accesses to the memory unit, verification means for comparing a latest address read out by the memory read-out means with an address of a write access to the memory unit from any of the peripheral equipment or equipments and, when a difference between the two values is smaller than a value determined in advance, instructing the copying means to transfer a copy of the data in the write access to the memory unit to the memory unit or units of the other processing unit or units, but, when the difference between the two values is larger than the value determined in advance, instructing the copying means not to transfer the copy of the write access data to the memory unit or units of the other processing unit or units, a copy address register for indicating an address which makes an object of copying of the memory unit, and a copy mode flag for indicating that memory copying processing for making the stored contents of the memory unit of the self system with stored contents of the memory unit or units of the processing unit or units of the other system or systems coincide with each other is proceeding.
Thus, the memory read-out means designated by any of the processors or the copy processor register reads out all stored contents of the memory unit while the processing unit is effecting ordinary processing, and the copying means transfers the stored contents and copies of data to be stored into the memory unit from the processor or any of the peripheral equipment or equipments in the same order as the order of accesses to the memory unit to the memory unit or units of the other processing unit or units. Then, after all stored contents of the memory unit are read out by the memory read-out means, contents of the cache memory are written back into the memory unit by the processor, and the thus written back contents of the cache memory are transferred to the memory unit or units of the other processing unit or units by the copying means. Coincidence of the stored contents of the memory units of the plurality of processing units is achieved thereby.